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Magillem Product Training

How to take advantage of IP-XACT and Magillem tools in a design flow : exploration, analysis and evaluation of Magillem´s tools.

Two levels of workshop :

BASIC

Duration : One week
Location : On site or at Magillem´s premises
Resources : One Magillem senior engineer

Basic Training seminars are usually planned for groups of 6 people max

AGENDA

1 week : IP-XACT and MAGILLEM TOOLS training
  • Content
    • Schema presentation, XML and XPATH advanced usage
    • IP-XACT hierarchy
    • IP-XACT memory and register capture
    • IP-XACT project examples
    • TGI principle
    • TGI generator examples
      • Memory map and address map calculation
      • Routing table (channels versus bridges techniques)
    • Non TGI generators principle and warnings
    • IP-XACT (syntaxical and semantical) Checkers to ensure third party integration through a consistent set of rules
  • Magillem 4.1 is used for IP-XACT assessment :
    • MIP : Magillem IP-XACT Packager
    • MPA : Magillem Platform Assembly
    • MRV : Magillem Register View
    • MGS : Magillem Generator Studio

 

Examples and hands on cases as illustrated in figure 2 below :

 

PREMIUM

Duration : Three weeks
Location : On site or on Magillem´s Premises
Resources : One Magillem expert engineer

Premium Training seminars are usually planned for groups of 4 people max.

AGENDA

3 weeks : Flow analysis and requirements
  • IP repository examples study
    • Packaging of one fix IP
    • Packaging of one multiple parameter IP
    • Packaging of one configurable IP
  • Study of customer´s flow and requirements
    • For the automation of the interconnections, netlist generation Verilog , VHDL, …
    • Concurrent development and multiple views support with IP-XACT. How to assemble, verify and merge the IP-XACT fragments
      • Flow analysis
      • Packaging / Flow
      • Flow for RTL platform assembly : mix RTL mode
      • Flow for verification (simulators, BFMs, …)
           - Nc, Modelsim, Vera, VCS, Specman
      • Flow for synthesis
           - SDC files, timing extraction
      • Flow for Design For Test (DFT functions need to be identified by the packager)
           - With the objective of automating milestones of tests insertion
      • Flow pour I/O MUX-ing (merge, insertion of component)
      • Directory structure modification, where to store the IP-XACT files METADATA folders
      • Global definition for the “bus definition” or local definition
           - Update the connections
           - Update the parameters