Collaborative R&D

Magillem has been active in numerous collaborative projects involving European top corporations, universities, SMEs and its road map has been truly enriched by the results of joint R&D work performed over the years in this innovative eco system.


The project will develop an unified environment for the design of system applications on parallel platforms based on CPU, multicore, manycore, FPGA and heterogeneous Systems on Chips. The design tools composing this environment will provide an unified SW/HW specification interface and systematic procedures for composing models at different abstraction levels allowing for the automatic validation, drastically reducing the verification and debugging efforts.

The implementation of processing demanding applications can be satisfied by using new multi/many-core processing platforms, but new designs or porting IPs on them is difficult and costly. The integrated design flow of this project intends to provide: portability of IPs, systematic system design explorations, high level synthesis ofexecutables, and systematic test-bench generation at different design abstraction levels. All means to achieve cost-effectiveness of designs on parallel platforms.

ACOSE: Workbench for hardware/software codesign of embedded systems

When implementing new embedded applications, industrial companies are facing new challenges: these applications are very complex to program (between 5 and 10 million lines of code are common) and require handling of several possibly hetero­geneous models and languages. Integration choices are wide-ranging, from functions hard-coded in hardware IP to embedded software for multi-core clusters.
Additionally integration must take into account at the same time several kinds of constraints: processing power, memories, power budget limitation, etc. Thus, new methodologies are required to keep the productivity at an acceptable level, to support the complexity of designs and to ensure the integration of hardware and software design flow. ACOSE provides solutions to solve the following issues:
  • Managing application requirements which are transverse: functionality, performances, consumption, security, etc.
  • Hardware-Software partitioning
  • Safety constraints requiring rigorous design
  • Choice and configuration of the target hardware platform
  • Design and deployment issues within industrial contexts
  • Application code generation for the target platform
  • Simulation, co-simulation, virtual prototyping
  • Requirement traceability and specifications impact analysis
  • Performance analysis


Arrowhead ambition is to maximize efficiency and flexibility, increase energy efficiency and flexible usage of energy through cooperative automation. Perimeter: buildings and public infrastructures, manufacturing, process and energy industries. The Arrowhead approach to collaborative automation is based on an exchange of service between loosely coupled actors.
This method is the prevailing approach in many research projects (EU, National, internal to the company), as it addresses the collaboration of very large number of heterogeneous devices and actors in a globally networked and integrated future. The following benefits are expected:
  • Increase of flexibility, ranging from real-time product grade changes and process tuning to raw material quality changes,
  • Improvement in end-product quality will be achieved through the active control of the manufacturing process and its energy management, moving from \o_-line” to \in-process” quality and energy control through advanced automation.
  • Improved man-machine interaction through advanced Embedded Systems and \human-in- the-loop” control systems will improve quality, flexibility and productivity by preventing zero operator errors, and reducing accidents.
  • Agile adaptation to market demands, particularly for individual customization, will be achieved through reduced commissioning and production ramp-up times, allowing for fast changes in product type or grade.
  • Development of new business models will facilitate local and global interaction between actors

CRAFTERS: ConstRaint and Application driven Framework for Tailoring Embedded Real-time Systems

ICT-based service and product innovation is curtailed by the growing vertical chain of dependence on poorly interoperable proprietary technologies in Europe. This issue was identified to have high impact on European innovation productivity by the Report of the Independent Expert Group on R&D and Innovation, commonly known as the Aho-report.
The report demanded incentives for the convergence of shared technologies and markets as a remedy. Actions creating standardized, commercially exploitable yet widely accessible ecosystems in European priority areas should be publicly supported. Real-time applications for heterogeneous, networked, embedded many-core systems suffer from the lack of trusted pathways to system realization and application deployment. Service and product development efforts are high with many uncertainties discouraging such ventures.
This project brings to bear a holistically designed ecosystem from application to silicon. The ecosystem is realized as a tightly integrated multi-vendor solution and tool chain complementing existing standards. Feature-limited releases of reference tools and platforms are made available under favourable licensing conditions to support the evaluation and adoption of the results.
Full-fledged versions are retained for commercial exploitation and standardization of the overall ecosystem is pursued. As direct effects of the project results 30% reduction of the total cost of ownership, 50% shorter time-to-market, and 30% decrease of the number of development assets are expected. Marketable lead applications driving ecosystem development and benchmarking on the fields of industrial & intelligent transport systems, video & image processing, and wireless communications are produced. Key challenges include guaranteeing secure, reliable, and timely operation, back-annotation based forward system governance, Tool-tool, tool-middleware, and middleware-hardware exchange interfaces, and energy management with minimal run-time overhead.

EMC2: Embedded multi-core systems for mixed criticality applications in dynamic and changeable real-time environments

Embedded systems are the key innovation driver to improve almost all mechatronic products with cheaper and even new functionalities. Furthermore, they strongly support today’s information society as inter-system communication enabler. Consequently boundaries of application domains are alleviated and ad-hoc connections and interoperability play an increasing role. At the same time, multi-core and many-core computing platforms are becoming available on the market promising a breakthrough for system (and application) integration, efficiency and performance.

A major industrial challenge arises facing cost efficient integration of different applications with different levels of safety and security on a single computing platform in an open context. The objective of the EMC² project (Embedded multi-core systems for mixed criticality applications in dynamic and changeable real-time environments) is to foster these changes through an innovative and sustainable service-oriented architecture approach for mixed criticality applications in dynamic and changeable real-time environments.
The EMC² project focuses on the industrialization of European research outcomes and builds on the results of several previous ARTEMIS, European and National projects. It provides the paradigm shift to a new and sustainable system architecture which is suitable to handle open dynamic systems. EMC² is part of the European Embedded Systems industry strategy to maintain its leading edge position by providing solutions for:
  • Dynamic Adaptability in Open Systems
  • Utilization of expensive system features only as Service-on-Demand in order to reduce the overall system cost.
  • Handling of mixed criticality applications under real-time conditions
  • Scalability and utmost flexibility
  • Full scale deployment and management of integrated tool chains, through the entire lifecycle
  • Power supply challenges from dynamic operational changes in MCMC real time systems

H-Inception: Heterogeneous Inception

New types of emerging applications require microelectronics which closely interact with the surrounding environment in different physical domains (optical, mechanical, acoustical, biological, etc.). The main challenge is to correctly specify, dimension and verify these multi-domain microelectronics assisted systems, to avoid unnecessary errors and redesigns which hamper product quality and thus time to market.

Heterogeneous INCEPTION (“H-INCEPTION”) aims at developing and deploying a novel unified design methodology and tools to address the system-level design and verification need for these systems. This will be deployed inside the European Industry with an ecosystem, delivering all design technology ingredients, from design and verification methodology to the essential modeling languages and simulation engines. H-INCEPTION will enable the industrial partners to create multi-domain virtual prototypes by introducing abstract modeling techniques and fast system simulation concepts.
A rich consortium from 5 countries composed of semiconductor and fabless companies, equipment suppliers, EDA vendors, research institutes and universities cover different fields and applications domains such as automotive, wireless, avionics and biomedical will all contribute to the creation and validation of this unified design methodology and ecosystem.

HOPE: Hierarchically Organized Power/Energy management

The objective of the HOPE project is to propose a relevant solution for designing power efficient system on chip devices early in the design flow. On top of classical design flows, this high level approach relies on existing standards.
Considering the large number of constraints, especially for performance and energy, designing battery-powered communicating mobile objects in an industrial context is a tough task. With the increasing number of embedded processing units (having high frequencies), the growing size of LCD touch screens or the different available sensors (i.e. camera) or radio interfaces, the energy consumption can rapidly exceeds a threshold unacceptable in regards to the capacity of embedded battery.
Therefore, defining a hardware/software architecture that respects the required performance from the system application point of view and owns efficient power management strategies is a highly complex issue. This complexity has two main sources. The HOPE project intends to study and develop an approach for helping system level design and is based on the following main items:
  • An approach for sizing power architecture from a functional behavior analysis: break down the architecture in domains and define a power strategy (i.e. power intent); evaluate the solution in terms of power and temperature.
  • Study and develop SystemC-TLM models of components controlling power, clock and reset. Add power intent to purely functional SystemC-TLM models of a virtual platform. Verify functional/non-functional consistency and accurately evaluate the dynamic variation of the power consumption and the temperature.
  • Connect the developed models to an existing design flow with constraints vs. requirements tracking.

SAFECER: Safety Certification of software-intensive systems with reusable components

European industry has a great potential to achieve a leading position in the growing global market of safety relevant embedded systems, provided it is able to devise efficient and industrial-strength methods and processes for their development and certification.

SafeCer targets increased efficiency and reduced time-to-market by composable safety certification of safety-relevant embedded systems.
A primary objective is to provide support for system safety arguments based on arguments and properties of system components, as well as to provide support for generation of corresponding evidence in a similar compositional way. By efficient reuse during certification and stronger links between certification and development, a higher degree of component reuse is envisioned. Improved quality and reduced risk during verification, qualification and certification, will increase European industry competitiveness and pave the way for a cross-domain market for components qualified for certification. The main industrial domains targeted in nSafeCer are aerospace, automotive, construction equipment and railway. Other domains such as health care and cross-domain aspects will also be considered.
SafeCer builds on the 2 year ARTEMIS pilot project pSafeCer launched in April 2011. Sharing the same overall goals, the concepts developed in pSafeCer are in nSafeCer advanced into tangible industrial implementations of “project-ready”, unified and seamlessly integrated solutions, and demonstrators of the proof of concepts. Certification guidelines and training examples for various other domains will also be developed.

In addition to the deepening of the pSafeCer knowledge, nSafeCer adds scientific objectives, including support for product-lines and cross-domain certification and reuse. SafeCer brings together leading companies and SMEs across Europe (including technology, tool, and competence providers, as well as certification and standardization experts), which together with selected academic institutions are capable and motivated to realize the nSafeCer goals.

OPENES: Open ESL Technologies for Next Generation Embedded Systems

In order to improve European electronics system design productivity (faster time-to-market), design quality (less design errors and less re-designs) to stay competitive, the OpenES consortium joins forces to provide missing links in system-level design and to develop common open solutions based on four pillars:
  • Fill gaps in design flows with new interoperable tools and/or improve existing tools/flows ensuring the semantic continuity of the design flow.
  • Specifically focus on integral support of both functional and extra-functional1 requirements from specification to verification, jointly with the use cases defined at system level.
  • Raise reuse capabilities from IP to HW/SW subsystem in order to eliminate integration effort by supporting reuse of pre-integrated and pre-verified subsystems
  • Enhance interoperability of models and tools by upgrading and extending existing young open standards (SystemC TLM, SystemC-AMS, IP-XACT)
The common open and extensible solutions developed in the project will provide an appropriate design framework and interfaces built on standards wherever possible. Extensions on standards will be initiated where necessary. Due to this openness each partner can achieve an advanced complete system level design flow enhancing it according to specific requirements from a given application domain.
Thanks to OpenES, this enhancement can be done by linking in dedicated tools or partial flows without the need to use company specific proprietary approaches, formats and interfaces anymore. By this, a general significantly improved capability of system design and a new quality of cooperation between IC/IP-provider and system integrator are enabled. The broad relevance and functional capability of this common approach will be demonstrated by case studies from various key domains for the European industry: wireless/software defined radio, multimedia/set-top-box, automotive/traffic and security, and industrial/power control.

THINGS2DO: THIN but Great Silicon 2 Design Objects

The program THINGS2DO is focused on building the Design & Development Ecosystem for FD-SOI-technology. This technology is uniquely positioned to take advantage of some very distinct strengths of the European Semiconductor Industry.
The baseline 28nm FD-SOI technology is available at an inflection point in the semiconductor progression path and offers unique features at this particular point in time. 14nm-FD-SOI will then take the technology’s integration potential to unprecedented levels, utilizing the design/development ecosystem developed here. The key features of FD-SOI are:

  • FD-SOI steps up integration densities to the next node-generation, capitalizing on existing infrastructure and manufacturing investments.
  • Power dissipations of next technology nodes is going up, but FD-SOI offers a significantly lower power footprint than comparable technologies.
  • Process complexity is generally exploding due to stringent process complexity increases.

In this context, FD-SOI offers simplicity in processing. FD-SOI capitalizes on the strengths of the European supply infrastructure from wafer sourcing up to IP-offering and Services. In this context, the development groundwork needs to be created, in view to enable IC products and electronic systems to be migrated into the FD-SOI environment and to take advantage of the new possibilities, which FD-SOI offers on the product- and systems-level.
A new and game-changing technology such as FD-SOI can only be successful with a rich mix of product- and service-offerings in the development space. The design/development ecosystem is based on 3 pillars:

  • EDA – design automation is the basis to perform complex design creation and porting tasks. The EDA industry in Europe is particularly powerful with implantations from the big US-based companies as well as a lively ecosystem of small and medium size European companies active in this domain.
  • IP – availability of pre-designed building blocks is an absolute must for any emerging technology. The implementation environment is a vital part in conjunction with the IP needed for every complex SOC-development.
  • Services are a combination of IP and EDA-tooling. There is a rich mix of SMEs in Europe focused on this topic, providing service offerings to bring the innovative potential of FDSOI- technology into the leading systems and end-applications, of which Europe is so rich.

The work-packages of this project are focused on the creation and enhancement of the above 3 pillars with specific targets to European end-applications. The application domains identified for THINGS2DO are: Biomedical, Aeronautics and spatial, Personal Portable Devices, among others. They all need energy efficient systems to meet market needs. The measurable results will show in the availability of a rich ecosystem of EDA-design flows, porting tools and design centering systems, a rich IP-portfolio of design building blocks from a number of –sometimes competing- Design houses.

The embedment of the IPs into Design Platforms is also a significant criterion to look for. In addition this project will create results which are less measurable, but of equal or higher importance: the interconnectedness of European companies or European foreign implants will increase dramatically through this project thus contributing to strengthen the European Semiconductor Industry as a whole. As this project will significantly impact the end applications, an area where Europe has particular strength, the competiveness of Europe as an industrial region will profit all together.