BASIC Training:

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Day 1:

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￭ 9am-1pm: IP-XACT overview

– History and key concepts
– How to read and navigate in the IP-XACT specification/schema
– Main IP-XACT constructs

￭ 2pm-6pm: IP-XACT in depth

– Protocol descriptions (Bus Definition & Abstraction Definition)
– The Component schema
– Design and Design Configuration
– Last but not least the API (TGI)

Day 2:

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￭ 9pm- 1pm: IP-XACT for a purpose

– IP-XACT for connectivity
– IP-XACT for registers
– IP-XACT for file management

￭ 2pm-5pm: Use cases

– Leveraging IP-XACT for advanced flows
– Leveraging IP-XACT for Verification

￭ 5pm-6pm: Knowledge management and Q&A

PREMIUM Training:

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￭ Duration: Three weeks

￭ Location: On site or at Arteris IP´s premises

￭ Resources: One Arteris IP Expert engineer

￭ Premium Training seminars are usually planned for groups of 4 people max

￭ Agenda: Flow analysis and requirements

￭ Content:

￮ IP repository examples study

– Packaging of one fix IP
– Packaging of one multiple parameter IP
– Packaging of one configurable IP

￮ Study of customer´s flow and requirements

– For the automation of the interconnections, netlist generation Verilog, VHDL,
– Concurrent development and multiple views support with IP-XACT. How to assemble, verify and merge the IP-XACT fragments
– Flow analysis
– Packaging / Flow
– Flow for RTL platform assembly: mix RTL mode
– Flow for verification (simulators, BFMs, …)

﹥ Nc, Modelsim, Vera, VCS, Specman

– Flow for synthesis

﹥ SDC files, timing extraction

– Flow for Design For Test (DFT functions need to be identified by the packager)

﹥ With the objective of automating milestones of tests insertion

– Flow pour I/O MUX-ing (merge, insertion of component)
– Directory structure modification, where to store the IP-XACT files METADATA folders
– Global definition for the “bus definition” or local definition

﹥ Update the connections
﹥ Update the parameters